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Microprocessor system IP core generator
Kerber, Rostislav ; Tošovský, Petr (referee) ; Kubíček, Michal (advisor)
This master’s thesis deal’s with VHDL programming language, ISE Webpack design system and PicoBlaze microprocessor. The thesis describes essentials of VHDL programming language and its application. A simple introduction to ISE Webpack design environment is given. The thesis describes common peripherals and the PicoBlaze processor is described too, including its parameters and implementation aspects. Finally the thesis describes IP generator for generating complex FPGA design including Picoblaze processor.
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MicroFPGA module reference designs
Novotný, Tomáš ; Macho, Tomáš (referee) ; Valach, Soběslav (advisor)
This bachelor's thesis demonstrates reference designs for microFPGA module. This thesis shows possible approaches to the use of module's HW capabilities. There is an example of UART communication, soft-core processor PicoBlaze, programming PicoBlaze and managing its I/O operations. Next, there is an example of soft-core MicroBlaze processor connection to IP through PLB bus. In the HW design with MicroBlaze there is also an example of multiplexing the shared bus between RAM and Flash memory.
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MicroFPGA module reference designs
Novotný, Tomáš ; Macho, Tomáš (referee) ; Valach, Soběslav (advisor)
This bachelor's thesis demonstrates reference designs for microFPGA module. This thesis shows possible approaches to the use of module's HW capabilities. There is an example of UART communication, soft-core processor PicoBlaze, programming PicoBlaze and managing its I/O operations. Next, there is an example of soft-core MicroBlaze processor connection to IP through PLB bus. In the HW design with MicroBlaze there is also an example of multiplexing the shared bus between RAM and Flash memory.
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Microprocessor system IP core generator
Kerber, Rostislav ; Tošovský, Petr (referee) ; Kubíček, Michal (advisor)
This master’s thesis deal’s with VHDL programming language, ISE Webpack design system and PicoBlaze microprocessor. The thesis describes essentials of VHDL programming language and its application. A simple introduction to ISE Webpack design environment is given. The thesis describes common peripherals and the PicoBlaze processor is described too, including its parameters and implementation aspects. Finally the thesis describes IP generator for generating complex FPGA design including Picoblaze processor.
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